1. Field of the Invention
The present invention relates to integrated circuits including circuit packaging and circuit communication technologies and, in particular, relates to the provision of a method of interconnecting or mapping a two-dimensional optoelectronic (OE) device array to a one-dimensional waveguide array. Furthermore, the present invention also pertains to an arrangement for the interconnecting or mapping of a two-dimensional optoelectronic (OE) device array to a one-dimensional waveguide array, utilizing the method pursuant to the invention.
Presently utilized high-end computer systems are limited in their outputs or operational performances to a certain lesser extent by the clock speeds of microprocessors than they are by the interconnections, which are provided between the microprocessors. Consequently, in view of increases in the throughput of data rates, which are encountered in present computer systems, traditionally employed cooper links or connections which are thus restricted to shorter distances, especially in the presence of power constraints and high aggregate bandwidths. Accordingly, for board-to-board and rack-to-rack interconnects, the overall throughput of data is beginning to be limited due to the increasing density of edge connectors. The incorporation of highly-parallel optical data links into these high-end computer systems is deemed to offer a superior degree of performance with regard to the intent of obtaining greater connector densities, with a concomitant reduction in power dissipation and resulting in reduced production and operation expenditures.
In essence, parallel optical modules are constituted of arrays of silicon circuitry, which are connected to optoelectronic (OE) devices and implemented with the employment of III-V semiconductors.
A circuit packaging option, which is particularly attractive in the implementation thereof, resides in connecting two substrates utilizing flip-chip technology. This, in essence, necessitates that the optoelectronic (OE) device is constrained to operate at a wavelength at which the OE substrate is transparent, whereby the projected optical beam is emitted or detected through the substrate. In that instance, the light can be readily coupled to polymer-based waveguides, which are easily routed across the circuit board to other optical modules, and wherein the waveguides, in an alternative construction, can also be embedded in the circuit board.
Moreover, it is also possible to employ the presently known more traditional configurations in which the silicon chip is connected to the circuit board utilizing a ball grid array (BGA) and the OE device is connected to the silicon chip through the intermediary of wirebonds. The OE device emits or detects light in an upward direction from the top surface, and whereby the waveguide is mounted above the OE chip, which supports the OE device.
Inasmuch as the waveguides are lithographically defined, the physical density between adjacent of the linear channels can be extremely high, for example, such as at an about 62.5 μm pitch. However, in that instance, it is physically impractical to lay out the channels in the optical module at this narrow pitch, in view of the space which is required in order to be able to implement the placements of the OE devices and the silicon circuitry, and provide space for lens coupling elements, as a result of which, currently a practical pitch for these channels is deemed to be about 250 μm. The waveguides can, accordingly, be fanned out to the wider module pitch. However, as the number of optical channels employed increases, this approach is encumbered with a number of drawbacks in the implementation thereof. In particular, as the linear dimension increases, the optical alignment between the modules and the waveguides becomes increasingly difficult to maintain due to excessive run out. Moreover, a timing skew, which is encountered between channels at the edge of the array and those optical channels, located proximate to or in the center becomes extremely large and disconant in its dimensions.
An alternative approach in an attempt to obviate the encountered drawbacks would be to fabricate the electro optical device channels on a rectangular 2D (two-dimensional) array, whereby this arrangement produces a more compact optical module, providing for an easier optical alignment between the waveguide and the channels and a reduced timing skew between the channels. However, this approach is somewhat disadvantageous in that the optical waveguides must be routed around relatively sharp bends, and in most instances, polymer waveguides are subjected to substantial losses at bend radii which are less than 5 mm.
The current state of the technology does not disclose the particular novel aspects of interconnecting or mapping a two-dimensional OE device array to a one-dimensional waveguide array analogous to that set forth by the present invention.
2. Discussion of the Prior Art
Lea, U.S. Pat. No. 5,543,830, discloses an apparatus with a light emitting element, microlens and gradient index lens characteristics for imaging continuous tone images. In that instance, there is no disclosure of any interconnecting or mapping of a two-dimensional OE device array to a one-dimensional waveguide array analogous to the present invention.
Similarly, Chakravorty, et al., U.S. patent Publication No. 2003/0002770 A1 fails to provide for the particular coupling analogous to the present invention and, in effect, provides for a flip-chip package integrating optical and electrical devices and coupling to a waveguide on a circuit board in a manner as described with regard to the current state of the art. In that instance, in the prior art, the structure is disclosed in regard to a waveguide, which is embedded within the circuit board, and does not provide for the advantages of the present arrangement and method.
With regard to European Patent Application No. 0 544 002 A1, this also discloses an image-forming device including a laser beam scanner and does not direct itself to the interconnecting or mapping of a two-dimensional OE device array to a one-dimensional waveguide array.
Finally, with regard to P. Schnitzer, et al., “High Performance VCSEL Arrays for Optical Interconnection”, 1998 Electronic Components and Technology Conference, Pages 762-770; 25-28 May 1998, this reference also does not disclose the particular interconnection and mapping of a two-dimensional OE device array to a one-dimensional waveguide array, and requires optical waveguides to be routed around sharp ends resulting in substantial losses, which renders the construction to be essentially impractical in use.